Running the Design on Hardware - Running the Design on Hardware - 2.0 English - PG289

The following steps are used to run the BIT and ELF files on the hardware setup:

1. Connect the JTAG cable and USB UART cable to the board.
2. Launch the Xilinx System Debugger by selecting Start > All Programs > Xilinx Design Tools > Vivado <version> > Vivado <version> Tcl Shell.
3. In the AMD command shell window, change to the Example Design Project directory: vivado% cd ./<IP instance name>_ex
4. Invoke the Xilinx System Debugger (xsdb): vivado% xsdb
5. Establish connections to debug targets: xsdb% connect
6. Set the target processor:

   xsdb% targets -set -filter {name =~ "Cortex-A53 #0"}
   xsdb% rst -processor
   xsdb% after 1000
   

7. Download the software .elf to the FPGA:

    xsdb% dow ./<vitis_workspace>/<platform_name>/export/platform/sw/boot/fsbl.elf
   xsdb% after 1000
   xsdb% con
   xsdb% after 1000
   xsdb% stop 
   xsdb% after 1000
   xsdb% dow ./<vitis_workspace>/xuhdsdi_pixco_example/build/xuhdsdi_pixco_example.elf

8. Run the software: xsdb% con
9. To observe the results, open Tera Term or PUTTY, and configure the serial port (Interface 0) to 115200 baud with the default configuration. Ensure that the UART cable is connected to the board and the PC.

   The UART console displays the SDI stream details on the console.