partial_frm_wr_done - partial_frm_wr_done - 3.1 English - PG278

Video Frame Buffer Read and Video Frame Buffer Write v3.1 LogiCORE IP Product Guide (PG278)

Document_ID
PG278
Release_Date
2026-07-22
Version
3.1 English

The partial_frm_wr_done is an optional output port for frame buffer writes. It signals transition from 0 to 1 when the number of pixel lines written into memory reaches the integer value set in the 0x0070 register. If the register is reset, zero, or greater than the frame height, the 0‑to‑1 transition on the output port asserts synchronously. By default, this occurs with the last pixel of the frame.