Y_U_V12_L16LE - Y_U_V12_L16LE - 3.1 English - PG278

Video Frame Buffer Read and Video Frame Buffer Write v3.1 LogiCORE IP Product Guide (PG278)

Document_ID
PG278
Release_Date
2026-07-22
Version
3.1 English

Three Planar YUV 4:4:4 with 12-bits per component, where each component is packed to 16-bits with LSB alignment. Y, U, and V are stored in three separate planes, as shown.

63:60 59:48 47:44 43:32 31:28 27:16 15:12 11:0
x Y3 x Y2 x Y1 x Y0
63:60 59:48 47:44 43:32 31:28 27:16 15:12 11:0
x U3 x U2 x U1 x U0
63:60 59:48 47:44 43:32 31:28 27:16 15:12 11:0
x V3 x V2 x V1 x V0