A highly parameterizable test bench was used to test the Video Frame Buffer Read and Video Frame Buffer Write in AMD Vitis™ High-Level Synthesis (HLS). Testing included the following:
- Register accesses
- Processing multiple frames of data
- Varying IP throughput and pixel data width
- Testing the Video Frame Buffer Read and Video Frame Buffer Write with AXI4-Stream and memory mapped AXI4 interface
- Testing of various frame sizes
- Varying parameter settings