References - 1.0 English - PG268

MicroBlaze Triple Modular Redundancy (TMR) Subsystem LogiCORE IP Product Guide (PG268)

Document ID
PG268
Release Date
2025-12-09
Version
1.0 English

These documents provide supplemental material useful with this guide:

  1. AXI Timebase Watchdog Timer LogiCORE IP Product Guide (PG128)
  2. AMBA AXI and ACE Protocol Specification (Arm IHI 0022E)
  3. 7 Series FPGAs Configuration User Guide (UG470)
  4. MicroBlaze Processor Reference Guide (UG984)
  5. Soft Error Mitigation Controller LogiCORE IP Product Guide (PG036)
  6. UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)
  7. AXI UART Lite LogiCORE IP Product Guide (PG142)
  8. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
  9. Vivado Design Suite User Guide: Designing with IP (UG896)
  10. Vivado Design Suite User Guide: Getting Started (UG910)
  11. Vivado Design Suite User Guide: Logic Simulation (UG900)
  12. Vivado Design Suite User Guide: Programming and Debugging (UG908)
  13. AXI Interconnect LogiCORE IP Product Guide (PG059)
  14. LMB BRAM Interface Controller LogiCORE IP Product Guide (PG112)
  15. The following lists additional resources you can access directly using the provided URLs: Brigham Young University, Configurable Computing Lab
  16. Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)