Monitor Transmit Register (MON_TRANSMIT) - 1.0 English - PG268

This 32-entry-deep FIFO contains data transmitted to the SEM monitor. The FIFO bit definitions are shown in the following table. Data to be transmitted is written into this register. When a write request is issued while the FIFO is full, a bus error (SLVERR) is generated and the data is not written into the FIFO. This is a write-only location. Issuing a read request to the transmit data FIFO generates the read acknowledgment with zero data. Table 2 shows the location for data on the AXI interface. The register is only implemented if C_INTERFACE is set to 0.