These two registers contain individual bits to mask the corresponding Compare input signals during test. CMR0 masks Compare_0 to Compare_31, and CMR1 masks Compare_32 to Compare_63. Each compare input signal is masked when the corresponding bit is set to 0. The register definitions are shown in the following table. The registers are write-only. Issuing a read request generates the read acknowledgment with zero data. The registers are only implemented if C_COMPARATORS_MASK is set to 1, and the available number of bits is determined by C_NO_OF_COMPARATORS. The initial value after reset is determined by C_MASK_RST_VALUE.
| Comparison Mask | |
|---|---|
| 31 | 0 |