The following table shows details about performance and resource utilization.
| Name | vcu_ddr4_controller_0 (vcu_llp2_trd_vcu_ddr4_controller_0_0) | vcu_0 (vcu_llp2_trd_vcu_0_0) |
|---|---|---|
| CLU LUTS | 23066 | 434 |
| CLB Registers | 25270 | 1681 |
| CARRY8 | 170 | 0 |
| F7 MUXES | 1147 | 0 |
| BLOCK RAM TILE | 123 | 0 |
| DSPs | 3 | 0 |
| HPIOBDIFFINBUF | 9 | 0 |
| BITSLICE_RX_TX | 105 | 0 |
| GLOBAL CLOCK BUFFERS | 5 | 0 |
| PLL | 3 | 0 |
| MMCM | 1 | 0 |
The following table illustrates the resource utilization for VCU DDR4 Controller based on the vcu_llp2_trd_vcu_ddr4_controller_0_0.
| Memory | Usage |
|---|---|
| Block RAM only | Block RAM: 123 |
| Block RAM + UltraRAM | Block RAM: 43, UltraRAM: 80 |
| UltraRAM only | Not Supported |