Register Space - Register Space - 2026.1 English - PG252

H.264/H.265 Video Codec Unit v1.2 Solutions LogiCORE IP Product Guide (PG252)

Document_ID
PG252
Release_Date
2026-09-03
Version
2026.1 English

The AMD Zynq™ UltraScale+™ MPSoC VCU soft IP implements registers in the programmable logic. The following table summarizes the soft IP registers. These registers are accessible from the PS through the AXI4-Lite bus.