Features - 2024.1 English - PG252

H.264/H.265 Video Codec Unit v1.2 Solutions LogiCORE IP Product Guide (PG252)

Document ID
PG252
Release Date
2024-05-30
Version
2024.1 English

The features of the AMD LogiCORE IP H.264/H.265 Video Codec Unit (VCU) core for Zynq UltraScale+ MPSoC devices are as follows:

  • Multi-standard encoding/decoding support, including:
    ISO MPEG-4 Part 10
    Advanced Video Coding (AVC)/ITU H.264
    ISO MPEG-H Part 2
    High Efficiency Video Coding (HEVC)/ITU H.265
    HEVC
    Main, Main Intra, Main10, Main10 Intra, Main 4:2:2 10, Main 4:2:2 10 Intra up to Level 5.1 High Tier
    AVC
    Baseline, Main, High, High10, High 4:2:2, High10 Intra, High 4:2:2 Intra up to Level 5.2
  • Support simultaneous encoding and decoding of up to 32 streams with a maximum aggregated bandwidth of 3840x2160@60fps
  • Low latency rate control
  • Flexible rate control: CBR, VBR, and Constant QP
  • Supports simultaneous encoding and decoding up to 4K UHD resolution at 60 Hz of two video contents.
    Note: 4k (3840x2160) and below resolutions are supported in all speedgrades. However, 4K DCI (4096x2160) requires -2 or -3 speedgrade.
  • Supports 8K UHD at reduced frame rate (~15 Hz)
  • Progressive support for H.264 and H.265; Interlace -alternate mode support for H.265
  • Video input:
    • Semi-planar formats of YCbCr 4:2:2, YCbCr 4:2:0, and Y-only (monochrome)
    • 8 and 10-bit per color channel