Simulation - 1.0 English

SmartConnect (PG247)

Document ID
PG247
Release Date
2022-10-19
Version
1.0 English

For comprehensive information about Vivado simulation components, as well as information about using supported third-party tools, see the Vivado Design Suite User Guide: Logic Simulation (UG900) [Ref 7].

 

IMPORTANT:   For cores targeting 7 series or Zynq-7000 devices, UNIFAST libraries are not supported. Xilinx IP is tested and qualified with UNISIM libraries only.