- Supports up to 16 slave interfaces (SI) and up to 16 master interfaces (MI)
per instance.
- Supports connecting one SI to up to 64 AXI4-Lite MI.
- Allows cascading SmartConnect
instances to interconnect a larger number of masters/slaves or for organizing the
interconnect topology.
- Complies with the AXI Protocol specification. Connect each SI and MI of
SmartConnect to a master or slave IP interface of
type AXI3, AXI4, or
AXI4-Lite.
- Automatically converts transactions between interfaces of different
protocol types.
- Automatically splits burst transactions, as required, to remain AXI
compliant.
- Supports the following interface data widths (bits):
-
AXI4 and AXI3: 32, 64,128, 256, 512, or 1024.
-
AXI4-Lite: 32 or 64-bit.
- Automatically converts transactions between interfaces of different data
widths.
- Supports multiple clock domains (the IP provides one clock pin per domain).
- Automatically converts transactions between interfaces in different
clock domains.
- Supports address widths up to 64 bits:
-
SmartConnect decodes up to 256
total address range segments.
- Supports user-defined signals up to 512 bits wide per channel.
- User signals on any AXI channel are propagated regardless of internal
transaction conversions.
- Support for read-only and write-only masters and slaves, resulting in
reduced resource utilization.
- Supports multiple outstanding transactions:
- Supports connected masters with multiple reordering depth (ID threads).
- Supports write response reordering, Read data reordering, and Read Data
interleaving.
- Supports multi-threaded traffic (masters issuing multiple ID threads)
across the interconnect topology regardless of internal transaction conversions,
including data width conversion and transaction splitting.
- Uses the single-slave per ID method of cyclic dependency (deadlock)
avoidance.
- For each ID thread issued by a connected master, the SmartConnect allows one or more outstanding transactions
to only one slave device for writes and one slave device for reads, at a time.
- Supports multiple parallel pathways along all AXI channels when connected
to multiple masters and multiple slaves:
- In Performance mode, each AXI channel has independent destination-side
arbitration. Transfers from two or more source endpoints to separate destination
endpoints can occur concurrently, for any AXI channel.
- Uses round-robin arbitration for each of the AW, AR, R, and B channels
(W-channel transfers follow the same order as AW-channel arbitration, per AXI protocol
rules).
- Supports back-to-back transfers (100% duty cycle) on any AXI channel:
- Single data-beat transactions can traverse the SmartConnect at the same bandwidth as multi-beat
bursts.
- Supports TrustZone security for each connected slave:
- If configured as a secure address segment, permits only secure AXI
accesses according to the AXI
arprot or awprot signal.
- Blocks any non-secure accesses, and the AXI SmartConnect core returns a
decerr
response to the connected master.
- Supports exclusive access between connected masters and slaves.
- Uses an internally resynchronized reset:
- Provides one
aresetn input per
IP.