Y_U_V12 - 5.3 English - PG243

Video Mixer LogiCORE IP Product Guide (PG243)

Document ID
PG243
Release Date
2025-05-29
Version
5.3 English

Three Planar YUV 4:4:4 with 12 bits per component. Y, U, and V are stored in three separate planes, as shown in the following tables. The U plane is assumed to have an offset of stride x height bytes from the Y plane buffer address. The V plane is assumed to have an offset of stride x height bytes from the U plane buffer address.

47:36 35:24 23:12 11:0
Y3 Y2 Y1 Y0
47:36 35:24 23:12 11:0
U3 U2 U1 U0
47:36 35:24 23:12 11:0
V3 V2 V1 V0