This register is not applicable if the layer is a streaming layer. If it is a memory layer, the layer stride determines the number of bytes between rows of pixels or rows of tiles in memory based on the following memory video formats:
- Memory in Raster Order
- The stride value in raster order defines the address offset between two consecutive rows of pixels.
- Memory in Tile Order
- The stride value in tile order defines the address offset between two consecutive rows of tiles. A row of tiles corresponds to four rows of pixels. The stride in tile order is also referred to as Pitch.
When a video frame is stored in memory, the memory buffer might contain extra padding bytes after each row of pixels. The padding bytes only affect how the image is stored in memory, but does not affect how the image is displayed.
Padding bytes are necessary to make sure that every row of pixels starts at an address that is aligned with the size of the data on the memory mapped AXI4 interface. Therefore, layer stride needs to be a multiple of the memory mapped AXI4 data size. For the Video Mixer, the data size of the memory mapped AXI4 interface is 64 × Samples per Clock bits, that is, 64, 128, 256, and 512 bits for 1, 2, 4, and 8 samples per clock, respectively. In tile format, padding bytes are also necessary when the width of the video frame is not exactly divisible by the width of the tile.