Versal adaptive SoC GTM transceivers do not contain any internal encoding options; instead, they operate in raw mode. Both the 8b10b and the 64b66b encoding and decoding functions are instead performed by the JESD204C IP core.
In 64b66b mode the JESD204C IP core requires both a 64-bit clock and a 66-bit
clock for the gearbox of the encoder and decoder. The JESD204C core_clk supplies the 64-bit clock. The 66-bit clock (txusrclk/rxusrclk) is sourced from the Versal Adaptive SoC Transceiver
port via a outclock
bufg_gt. Generate the example design for an illustration of
how to connect these clocks.
In 8b10b mode no extra clocking is required.