SYSREF on Initial Link Bring-Up with 64B66B Linecoding - 4.2 English

JESD204C LogiCORE IP Product Guide (PG242)

Document ID
PG242
Release Date
2023-11-06
Version
4.2 English

After a reset, a JESD204C core configured for subclass 1 operation requires at least one SYSREF event to align the internal LMBC counter, and bring up the link:

  • A receiver core requires an initial SYSREF event to align the LMBC. The core does not start the LEMC counter until an initial SYSREF event is detected.
  • A transmitter core requires a SYSREF event to align the LMBC. The core does not begin transmission of multiblocks until an initial SYSREF event is detected. Therefore, a link cannot achieve multiblock lock until after a SYSREF event has been seen by both a transmitter and a receiver.

The system must ensure that SYSREF to the JESD204C core is generated after the core has completed reset. This is of particular importance if the system is operating a One-shot SYSREF.