These documents provide supplemental material useful with this guide:
- Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)
- Versal Adaptive SoC GTM Transceivers Architecture Manual (AM017)
- Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
- Vivado Design Suite User Guide: Designing with IP (UG896)
- Vivado Design Suite User Guide: Getting Started (UG910)
- Vivado Design Suite User Guide: Logic Simulation (UG900)
- ISE to Vivado Design Suite Migration Guide (UG911)
- Vivado Design Suite User Guide: Programming and Debugging (UG908)
- Vivado Design Suite User Guide: Implementation (UG904)
- Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)
- AXI Interconnect LogiCORE IP Product Guide (PG059)
- JESD204C Standard (www.jedec.org)
- Vivado Design Suite: AXI Reference Guide (UG1037)
- JESD204 PHY LogiCORE IP Product Guide (PG198)
- Versal Adaptive SoC Transceivers Wizard LogiCORE IP Product Guide (PG331)
- Versal Adaptive SoC Transceiver Subsystem Product Guide (PG442)