| JESD204C + GT Latency | Assume a DAC with Parameters | Assume |
|---|---|---|
| TTXLMFC = 24 bytes | TRXIN = 50±2 bytes | TWIRE = 0 |
| TTXOUT = 40±2 bytes | TRXLMFC = 4 bytes | LMFC = 32 bytes |
| TTXIN = 0 | TRXOUT = 20 bytes |
(TTXOUT(max) + TWIRE(max) + TRXIN(max)) < ((N+1)*LMFC - TTXLMFC + TRXLMFC)
(TTXOUT(min) + TWIRE(min) + TRXIN(min)) > (N*LMFC - TTXLMFC + TRXLMFC)
(42 + 0 + 52) < ((N+1)*32 - 24 + 4) and (38 + 0 + 48) > (N*32 - 24 + 4)
Try N = 3
94 < 108 and 86 > 76
N = 3 is OK, no need to skew SYSREF
The data is received after three LMFCs (N) and less than four LMFCs (N+1), so the latency is 4*LMFC plus fixed delays:
TLAT = T + TTXIN
TLAT = (N+1)*LMFC - TTXLMFC + TRXLMFC + TTXIN
= 128 - 24 + 4 + 20 = 128 byte clock periods
Note: GT latency is not accounted for these calculations.