Calculating End to End Latency - 4.2 English

JESD204C LogiCORE IP Product Guide (PG242)

Document ID
PG242
Release Date
2023-11-06
Version
4.2 English

The end to end latency is always fixed and made up of one LEMC period plus the fixed TX and RX delays. To calculate the end to end latency, use the following steps, referring to the following figure.

Figure 1. End to End Latency

The delay between LEMC at TX and LEMC at RX (T) is the LEMC period adjusted by the internal delays from SYSREF to LEMC of TX and RX:

T = LEMC - TTXLEMC + TRXLEMC

To ensure the overall propagation delay is constant between system restarts, the maximum propagation delay must be less than T:

TTXOUT(max) + TWIRE(max) + TRXIN(max) < T

Substituting LEMC - TTXLEMC + TRXLEMC for T gives:

TTXOUT(max) + TWIRE(max) + TRXIN(max) < LEMC - TTXLEMC + TRXLEMC

Additional delay can be added to the SYSREF processing in the JESD204C core (see Table 15). For each cycle of delay added to TX SYSREF, add 1 to TTXLEMC.

The data is received after the fixed delays of TX and RX adjusted by the internal delays from SYSREF to LEMC of TX and RX. This value is also the minimum value for deterministic latency.

TLAT = TTXOUT(max) + TWIRE(max) + TRXIN(max) - TTXLEMC + TRXLEMC

Table 1. Example
JESD204C + GT Latency Assume a DAC with Parameters Assume
TTXLEMC = 6 words TRXIN = 12±1 words TWIRE = 0
TTXOUT = 14±1 words TRXLEMC = 1 word LEMC = 64 words
TTXIN = 0 TRXOUT = 5 words  

TTXOUT(max) + TWIRE(max) + TRXIN(max) < LEMC - TTXLEMC + TRXLEMC

15 + 0 + 13 < 64 - 6 + 1

28 < 59

The data is received after the fixed delays of TX and RX adjusted by the internal delays from SYSREF to LEMC of TX and RX.

TLAT = TTXOUT(max) + TWIRE(max) + TRXIN(max) - TTXLEMC + TRXLEMC

TLAT = 15 + 0 + 13 - 6 + 1

TLAT = 23 clock cycles