Timing Register-4 - 2.3 English

MIPI DSI Transmitter Subsystem LogiCORE IP Product Guide (PG238)

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2.3 English
Table 1. Timing Register-4 (0x5C)
Bits Name Reset Value Access Description
31:24 Reserved NA NA Reserved
23:16 VSA 0x0 R/W Vertical sync active lines
15:8 VBP 0x0 R/W Vertical back porch lines
7:0 VFP 0x0 R/W Vertical front porch lines. The minimum VFP should be greater than 1.
  1. Higher VFP value can be programmed using Timing Register-5.