This section details registers available in the MIPI DSI TX Subsystem. The address map is split into following regions:
- MIPI DSI TX Controller core
- MIPI D-PHY core
Each IP core is given an address space of 64K. Example offset addresses from the system base address when the MIPI D-PHY registers are enabled are shown in the following table. Registers are provided for informational and debug purposes. For more details, refer to the provided driver API for the supported control of the MIPI DSI TX Subsystem.
| IP Cores | Offset |
|---|---|
| MIPI DSI TX Controller | 0x0_0000 |
| MIPI D-PHY | 0x1_0000 |