Protocol Configuration Register - Protocol Configuration Register - 3.0 English - PG238

MIPI DSI Transmitter Subsystem LogiCORE IP Product Guide (PG238)

Document_ID: PG238
Release_Date: 2026-07-13
Version: 3.0 English

Allows you to configure protocol-specific options such as the number of lanes to be used.

Table 1. Protocol Configuration Register (0x04)
Bits	Name	Reset Value	Access	Description
31:15	Reserved	N/A	N/A	Reserved
14	CMD/LPDT Mode Control	0x0	R/W	0: CMD mode is selected 1: LPDT is selected¹
13	EoTp	0x1	R/W	0: Disable EoTp Generation 1: Enable EoTp Generation.
12:7	Pixel Format	0x3E	R	Data type for pixel format. The data type of pixel format is selected through the GUI.² 0x0E: Packed RGB565 0x1E: packed RGB666 0x2E: Loosely packed RGB666 0x3E: Packed RGB888 0x0B: Compressed Pixel Stream 0x2C: Packed 16-bit YUV 422 0x3C Packed 20-bit YUV 422
6	BLLP Mode	0x0	R/W	BLLP selection 0: Send blanking packets during BLLP periods 1: Use LP mode for BLLP periods in Vertical blanking. It is not generated for Horizontal blanking.
5	Blanking packet type	0x0	R/W	Blanking packet type for BLLP region 0: Blanking packet(0x19) 1: Null packet(0x09)
4:3	Video Mode	0x0	R/W	Video mode transmission sequence 0x0: Non-burst mode with sync pulses 0x1: Non-burst mode with Sync Events 0x2: Burst mode
2	Reserved	N/A	-	Reserved for future lane extension support
1:0	Active Lanes	Configured lanes during core generation	R	Configured lanes in the core 0x0: 1 Lane 0x1: 2 Lanes 0x2: 3 Lanes 0x3: 4 Lanes
This selection has significance only when Core_configuration register bit-3 (command_mode) is set to 1. The default data type selected in the GUI is RGB888. Hence, the default value of the register is mentioned as 0x3E. It varies with the data type selected in the GUI.