Features - Features - 3.0 English - PG238

MIPI DSI Transmitter Subsystem LogiCORE IP Product Guide (PG238)

Document_ID
PG238
Release_Date
2026-07-13
Version
3.0 English
  • 1–4 lanes D-PHY and 1–3 lanes C-PHY support
  • Line rates ranging from:
    • 260–2500 Mb/s for AMD Versal™ adaptive SoCs
    • 400–2500 Mb/s with D-PHY mode for Versal AI Edge Series Gen 2 and Versal Premium Series Gen 2 devices
    • 400–2250 Ms/s with C-PHY mode for Versal AI Edge Series Gen 2 and Versal Premium Series Gen 2 devices
    • 80–2500 Mb/s (refer to your specific device datasheet)
  • Supports different data types with a fixed Virtual Channel Identifier (VC) of 0. For a list of data types, refer to the DSI Data type parameter in the Configuration Tab.
  • Supports LP mode in the BLLP region during video transmission
  • Programmable EoTp generation support
  • ECC generation for packet header
  • Optional CRC generation for data bytes
  • Optional DCS Command mode support to send command packets long/short
  • Optional LPDT and ULPS Escape mode support
  • Pixel-to-byte conversion based on data format
  • AXI4-Lite interface to access core registers
  • Compliant with AXI4-Stream Video IP and System Design Guide (UG934) for input video stream
  • Interrupt generation to indicate subsystem status information