- ULPS uses the clock and all data lanes; LPDT uses data lane 0
only.
- For ULPS, there is no individual lane control, all lanes go to ULPS
after ULPS is enabled.
- ULPS entry occurs immediately after
ulps_mode is enabled from register and controller resets the internal
image data FIFOs. So, when switching to Video mode after ULPS exit, controller
starts with new frame as it is discarded the old frame in ULPS mode.
- Escape mode LPDT data cannot go in Blanking time(LP).
- Trigger codes are not supported, that is,
txtriggeresc[3:0].
- LPDT transaction and DCS Command Data transaction are mutually
exclusive and both use Command Queue FIFO/ Data FIFO to store input written through
Command Queue Packet Register and Data FIFO Register for processing.
-
CMD_or_LPDT_mode_control bit in
Protocol configuration switches between DCS command mode and LPDT modes. Refer to
Case 5: Switching the Core Between Video/LPDT Mode for programming sequence.
- LPDT data input written through register interface through the
Command Queue Register for short packet and long packet header and Data FIFO
Register for long packet payloads.
- The maximum payload supported for LPDT is 251 bytes.