The following table shows an example based on a subsystem base address of 0x44A0_0000 (32 bits) where MIPI D-PHY register interface is enabled.
Core | Base address |
---|---|
MIPI DSI TX Controller | 0x44A0_0000 |
MIPI DPHY | 0x44A1_0000 |
The following table shows an example based on a subsystem base address of 0x44A0_0000 (32 bits) where MIPI D-PHY register interface is enabled.
Core | Base address |
---|---|
MIPI DSI TX Controller | 0x44A0_0000 |
MIPI DPHY | 0x44A1_0000 |