Implementing the Example Design - Implementing the Example Design - 6.0 English - PG232

MIPI CSI-2 Receiver Subsystem Product Guide (PG232)

Document ID
PG232
Release Date
2026-07-08
Version
6.0 English
  1. Open the Vivado Design Suite.

    The Vivado IDE Getting Started page contains links to open or create projects and to view documentation.


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  2. In the Getting Started page, click Create Project to start the New Project wizard.
  3. In the Project Name page, name the new project and enter the project location. Make sure to select the Create project subdirectory option, and click Next.
  4. In the Project Type page, specify the type of project to create as RTL Project, make sure to deselect the Do not specify sources at this time option, and click Next.
  5. In the Add Sources page, click Next.
  6. (Optional) In the Add Existing IP dialog box, click Next.
  7. (Optional) In the Add Constraints dialog box, click Next.
  8. In the Default Part dialog box, click Boards to specify the board for the target device (ZCU102, SP701, SCU200, VEK385, VEK280 and VCK190 boards are supported). Then click Next.
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  9. Review the New Project Summary page. Verify that the data appears as expected, per the steps above, and click Finish.
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  10. Click IP Catalog, select MIPI CSI-2 RX Subsystem under Video Connectivity, and double-click it.
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  11. You can rename the IP component name. Configure the MIPI CSI-2 RX Subsystem Application Example Design tab to select the ZCU102, SP701, SCU200, VEK385, VCK190, or VEK280 board-based design, then click OK.
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    Note: For SCU200 board-based designs, ensure that you configure the IO_Type_selection parameter to either XP5IO or HPIO, based on the required I/O type as shown in the following screenshot.
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    Note: For VEK385 board-based designs, ensure you configure the PHY_MODE parameter to either CPHY or DPHY as shown in the following screenshot.
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    The Generate Output Products dialog box displays.

  12. Click Generate. You can optionally click Skip if you want to skip generating the output products.
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  13. Right-click the MIPI CSI-2 RX Subsystem component under Design source, and click Open IP Example Design.
    Note: Because this step involves the generation of the complete system including multiple subsystems, it takes some time to completely build the design.

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  14. Choose the target project location, then click OK.

    The overall system IP integrator block diagram of the ZCU102, SP701, SCU200, VEK385, VEK280, or VCK190 board-based application example design is generated depending on the GUI option selected. You can choose to Run Synthesis, Implementation, or Generate Bitstream (Generate Device Image for the VEK280, VEK385, or VCK190 board).


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  15. Select File > Export > Export hardware (.xsa).
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  16. Select Tools > Launch Vitis IDE. Browse to your project location.