References - References - 4.0 English - PG211

These documents provide supplemental material useful with this guide:

1. IEEE Standard for Ethernet (IEEE Std 802.3-2015)
2. 25G and 50G Ethernet Consortium Schedule 3 version 1.6 (August 18, 2015) (http://25gethernet.org/)
3. Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)
4. Virtex UltraScale+ FPGAs GTM Transceivers Wizard LogiCORE IP Product Guide (PG315)
5. UltraScale Architecture GTH Transceivers User Guide (UG576)
6. UltraScale Architecture GTY Transceivers User Guide (UG578)
7. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
8. Vivado Design Suite Tutorial: Designing IP Subsystems Using IP Integrator (UG995)
9. Vivado Design Suite User Guide: Designing with IP (UG896)
10. Vivado Design Suite User Guide: Getting Started (UG910)
11. Vivado Design Suite User Guide: Logic Simulation (UG900)
12. ISE to Vivado Design Suite Migration Guide (UG911)
13. Vivado Design Suite User Guide: Programming and Debugging (UG908)
14. Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)
15. 50G IEEE 802.3 Reed-Solomon Forward Error Correction LogiCORE IP Product Guide (PG234). (Registration required for access)
16. AMBA AXI4-Stream Protocol Specification V1.0 (Arm IHI 0051A)
17. IEEE Standard 1588-2008, "IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems" (standards.ieee.org/findstds/standard/1588-2008.html)
18. Versal Adaptive SoC Transceiver Subsystem Product Guide (PG442)