STAT_HARD_RSFEC_RX_DELAY_REG: 04A4 - 4.1 English - PG210

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2025-01-31
Version
4.1 English
Table 1. STAT_HARD_RSFEC_RX_DELAY_REG: 04A4
Bits Default Type Signal
10 0 RO stat_hard_rsfec_rx_delay
  1. This register indicates the HARD_RFSEC_RX_DELAY value, it enables only RX hard RS-FEC enable and AXI4-Lite mode.