Register Space - 5.1 English - PG210

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)

Document ID
PG210
Release Date
2025-12-05
Version
5.1 English

The 10G/25G Ethernet Subsystem can be optionally configured with AXI4-Lite registers to access the configuration and status signals.

Note: The 10G/25G Ethernet subsystem requires that the address space is aligned to a 64k boundary, or is a multiple of 64k.