Bits | Default | Type | Signal |
---|---|---|---|
0 | 1 | RW | ctl_en_preempt |
1 | 0 | RW | ctl_hold_request |
2 | 0 | RW | ctl_disable_verify |
3 | 0 | RW | ctl_restart_verify |
5:4 | 2'b00 | RW | ctl_addfrag_size[1:0] |
15:8 | 8'h01 | RW | ctl_verify_time[7:0] |
19:16 | 4'h3 | RW | ctl_verify_limit[3:0] |