10G/25G Runtime Switchable IP Features - 10G/25G Runtime Switchable IP Features - 5.1 English - PG210

10G/25G High Speed Ethernet Subsystem Product Guide (PG210)
Document ID
PG210
Release Date
2026-07-08
Version
5.1 English
  • Complete MAC and PCS features
  • Base-KR mode based on IEEE 802.3 Clause 49
  • Statistics and Diagnostics
  • 66-bit SerDes interface using AMD GTY transceiver
  • Custom preamble and adjustable InterFrame Gap
  • Pause Processing
  • 64-bit AXI4-Stream interface
  • Optional Clause 73 Auto-negotiation
  • Optional Clause 72 Link Training
  • Optional Clause 74 FEC
Table 1. Feature Compatibility Matrix (GTY)
Variant User Interface MAC PCS Pause Processing Auto- Negotiation and Link Training 3 Clause 74 FEC Clause 108 RS-FEC IEEE 1588 Time Stamp
10G MAC with PCS 64-bit AXI4-Stream X X X X X   X
Low Latency 10G MAC with PCS 64-bit AXI4-Stream X X          
Low Latency 10G MAC with PCS 32-bit AXI4-Stream X X   X 2      
Low Latency 25G MAC with PCS 64-bit AXI4-Stream X X          
25G MAC with PCS 64-bit AXI4-Stream X X X X X 4 X X
Runtime switchable 10G/25G MAC+PCS 64-bit AXI4-Stream X X X X X X X
10G PCS-only XGMII   X   X X   X 1
25G PCS-only 25GMII   X   X X X X 1
Runtime switchable 10/25G PCS-only

XGMII/

25GMII

   X   X X X X 1
10G MAC-only 64-bit AXI4-Stream X   X        
Preemption (802.1CM) 10G/25G only 64-bit AXI4-Stream X X         X
  1. Only 2-step timestamping is supported with the PCS-only configurations.
  2. Only auto-negotiation logic.
  3. Auto-Negotiation and Link Training are supported for AMD UltraScale+™ and AMD UltraScale™ device families using the existing soft-RTL AN/LT logic. For AMD Versal™ device family, ANLT is supported when the Versal GT Wizard Subsystem is selected (IS_GT_WIZ_OLD = 0). Refer to the Versal Adaptive SoC Transceiver Subsystem Product Guide (PG442) for register specifications and configuration details. Refer to ANLT Support for Versal Devices Using Versal GT Wizard Subsystem.
  4. Clause 108 RS-FEC requires the BASE-KR license selection (EF-DI-25GBASE-KR) in the Vivado IDE. The Base-KR selection enables FEC and AN/LT features and uses the same underlying PCS as Base-R.
Table 2. Feature Compatibility Matrix (GTM)
Variant User Interface MAC PCS Pause Processing Auto- Negotiation and Link Training 2 Clause 74 FEC Clause 108 RS-FEC IEEE 1588 Time Stamp
10G MAC with PCS 64-bit AXI4-Stream X X X X X   X
Low Latency 10G MAC with PCS 64-bit AXI4-Stream X X          
Low Latency 25G MAC with PCS 64-bit AXI4-Stream X X   X      
25G MAC with PCS 64-bit AXI4-Stream X X X X X X 3 X
Runtime switchable 10G/25G MAC+PCS 64-bit AXI4-Stream X X X X X X X
Runtime switchable 10/25G PCS-only

XGMII/

25GMII

   X   X X X X 1
10G PCS-only XGMII   X   X X   X 1
25G PCS-only 25GMII   X   X X X X 1
Preemption (802.CM) 10G/25G only 64-bit AXI4-Stream X X         X
  1. Only 2-step timestamping is supported with the PCS-only configurations.
  2. Auto-Negotiation and Link Training are not supported for GTM devices for UltraScale+ and UltraScale device families. For Versal device family, ANLT is supported when the Versal GT Wizard Subsystem is selected (IS_GT_WIZ_OLD = 0). Refer to the Versal Adaptive SoC Transceiver Subsystem Product Guide (PG442) for register specifications and configuration details. Refer to ANLT Support for Versal Devices Using Versal GT Wizard Subsystem.
  3. Clause 108 RS-FEC requires the BASE-KR license selection (EF-DI-25GBASE-KR) in the Vivado IDE. The Base-KR selection enables FEC and AN/LT features and uses the same underlying PCS as Base-R.