Transmitter FIFO Threshold - Transmitter FIFO Threshold - 1.2 English - PG209

Interlaken 600G LogiCORE IP Product Guide (PG209)
Document ID
PG209
Release Date
2025-08-29
Version
1.2 English

The Interlaken 600G IP core has a FIFO in the TX path that holds enough data to properly format Interlaken bursts. The status of this FIFO is used to drive the tx_rdyout signal to inform the user logic whether the TX path can accept data. The threshold at which point tx_rdyout is asserted/deasserted is programmable through the ctl_tx_rdyout_thresh[2:0] input bus. This flexible mechanism allows you to optimize the logic and pipeline datapath that feeds the Interlaken 600G IP core transmitter.

To determine the proper value for ctl_tx_rdyout_thresh[2:0], follow these steps:

  1. Set ctl_tx_rdyout_thresh[2:0] to 3'h0.
  2. Simulate sending packets and observe the tx_ovfout signal.
  3. If tx_ovfout is never asserted, the minimum value for ctl_tx_rdyout_thresh[2:0] is found.
  4. If tx_ovfout is asserted, increase ctl_tx_rdyout_thresh[2:0] by one and repeat from step 2.