RX LBUS Interface - RX LBUS Interface - 1.2 English - PG209

Interlaken 600G LogiCORE IP Product Guide (PG209)

Document ID
PG209
Release Date
2025-08-29
Version
1.2 English

The synchronous RX Local bus interface provides packet-oriented data much like the TX Local bus interface accepts. All signals are synchronous with the rising edge of the Local bus clock. The following figure shows a sample waveform for a 1,536-bit data bus.

Figure 1. Sample RX Waveform with a 1536-bit Data Bus

Similar to the TX Local bus interface, the RX LBUS is divided into 128-bit segments, with multiple transfers presented in parallel during the same clock cycle.

The 128-bit segments are ordered 0 to 15 (for a 2,048-bit LBUS), or 0 to 11 (for a 1,536-bit LBUS), or 0 to 7 (for a 1,024-bit LBUS). The first of the 128--bit transfers occurs on segment 0 (that is, rx_dataout0), the second on segment 1 (that is, rx_dataout1), and so forth.

Data is transferred on a given rx_dataout<N> segment when the corresponding rx_enaout<N> is asserted. The RX core logic stores incoming data and does not forward it until it has a sufficient quantity. Consequently, there can be clock cycles where none of the rx_enaout<N> signals are asserted.

In any cycle where any rx_enaout<N> is asserted, rx_enaout0 is also required to be asserted. Furthermore, segments are filled in sequence with no gaps between active segments. For example, if rx_enaout<i> is set to 1, then rx_enaout<i-1> is also set to 1, for i ranging from 1 to 15 (for a 2,048-bit bus) or 1 to 11 (for a 1,536-bit bus) or 1 to 7 (for a 1024-bit bus).

The start of a packet is identified by the assertion of rx_sopout<N> with the corresponding rx_enaout<N>. Similarly, the end of a packet is identified by the assertion of rx_eopout<N> with the corresponding rx_enaout<N>. Both rx_sopout<N> and rx_eopout<N> can be asserted on a given cycle. This occurs for packets that are less than or equal to the LBUS width. Furthermore, both rx_sopout<N> and rx_eopout<N> can be asserted for a given segment on a given cycle. This occurs for packets that are less than or equal to 16 bytes (the segment size).

Specifically, the core outputs at most 1 + (RX_LBUS_WIDTH / 512) bursts per clock cycle, where a burst means a portion of a packet. This is identifiable on the RX LBUS with a channel change or SOP.

The channel number for a packet is presented on the rx_chanout<N> input of the corresponding segment and is valid for every segment where rx_enaout<N> is asserted. After SOP has been asserted for a certain channel number, it will not be asserted again with that channel number until EOP has been asserted for the same channel number.