Introduction - Introduction - 1.2 English - PG209

Interlaken 600G LogiCORE IP Product Guide (PG209)

Document ID
PG209
Release Date
2025-08-29
Version
1.2 English

Interlaken is a scalable chip-to-chip interconnect protocol designed to enable transmission speeds from 10 Gb/s to 100 Gb/s and beyond. Using the latest SerDes technology and a flexible protocol layer, Interlaken minimizes the pin and power overhead of chip-to-chip interconnect and provides a scalable solution that can be used throughout an entire system. In addition, Interlaken uses two levels of CRC checking and a self-synchronizing data scrambler to ensure data integrity and link robustness.

Interlaken defines two mechanisms for handling flow control across the interface:

  • In-band flow control
  • Out-of-band flow control

The choice of using in-band or out-of-band mechanisms depends on system considerations that are beyond the scope of this document. For further information or feedback, contact AMD.

This appendix describes the out-of-band flow control (OOBFC) implemented along with the Interlaken IP core.