Example Wrapper Clocking for an Asynchronous System - Example Wrapper Clocking for an Asynchronous System - 1.2 English - PG209

Interlaken 600G LogiCORE IP Product Guide (PG209)

Document ID
PG209
Release Date
2025-08-29
Version
1.2 English

In the asynchronous system, a separate clock is required for the RX and TX clocks. TXOUTCLK from one transceiver is sent to an MMCM, which generates the TX userclks for all of the transceivers and for tx_serdes_refclk in the Interlaken core. RXRECCLK from one transceiver is sent to an MMCM, which generates the RX userclk for all of the transceivers and for the rx_serdes_clk in the core.