Error Handling - Error Handling - 1.2 English - PG209

Interlaken 600G LogiCORE IP Product Guide (PG209)

Document ID
PG209
Release Date
2025-08-29
Version
1.2 English

The Interlaken 600G IP core performs robust checking of all possible error conditions as described in the Interlaken Protocol Definition, Revision 1.2, including the following errors:

  • Loss of lane alignment
  • CRC24 error
  • BurstShort violation
  • Illegal Control Word Type
  • Illegal framing pattern is detected

If any of the preceding conditions are detected, the Interlaken 600G IP core takes the following actions:

  • All open channels are marked as being in error and the packet in flight for these channels indicates the error condition by having rx_errout set to 1 when the corresponding rx_eopout is asserted.
  • All bits in the bus stat_rx_fc_stat become a value of 0 indicating an XOFF condition.
Additionally, in case of losing lane alignment, all data that is in the RX pipeline is lost.
Note: According to the Interlaken Protocol Definition, Revision 1.2, CRC32 errors do not affect open channels or flow control. Additionally, bits on the stat_rx_mubits bus are unaffected by the preceding errors and maintain their previous state.

The error handling circuits in the RX path perform EOP/SOP checks for packet or burst-interleaved modes of operation. The ctl_rx_packet_mode signal is used to select what type of error checking is to be performed.

The Interlaken 600G IP core is designed to handle packets that arrive interleaved as segments. The Interlaken 600G IP core ensures that packets for each channel have appropriate SOP and EOP pairings. For applications that only send complete packets, an SOP must be paired with the next EOP. To ensure this kind of checking, Packet Mode, the ctl_rx_packet_mode should be assigned a value of 1. For burst-interleaved mode, ctl_rx_packet_mode should be assigned a value of 0.

Note: This input should be static and must only be changed during reset.