Background - Background - 1.2 English - PG209

Interlaken 600G LogiCORE IP Product Guide (PG209)

Document ID
PG209
Release Date
2025-08-29
Version
1.2 English

If you are familiar with the AMD Interlaken 150G core, note the following differences now found in the Interlaken 600G IP core.

  • Maximum bandwidth has been increased from 150 Gb/s to 600 Gb/s.
  • User LBUS interface is always segmented.
  • Available segmented LBUS widths are 1024, 1536, and 2048 bits.
  • Instead of 1 burst per cycle, now 2, 3, or 4 bursts per cycle are permitted, depending on the LBUS width.
  • Some configurations only support BurstShort of 64 bytes.
  • Some configurations only support BurstMax of 256 bytes.
  • Some configurations now allow intermediate gaps in the LBUS (segments with tx_enain = 0).