AMD Transceiver Clocking - AMD Transceiver Clocking - 1.2 English - PG209

Interlaken 600G LogiCORE IP Product Guide (PG209)

Document ID
PG209
Release Date
2025-08-29
Version
1.2 English

The example wrappers provided with the core can be generated to provide clocking to the AMD transceivers for either a synchronous system or an asynchronous system. In a synchronous system, the same reference clock is used for the AMD transceivers and for the downstream device. In an asynchronous system, a different reference clock is used for the AMD transceivers and for the downstream device.