Data Path Clocks - 1.0 English - PG205

SMPTE UHD-SDI LogiCORE IP Product Guide (PG205)

Document ID
PG205
Release Date
2024-06-14
Version
1.0 English

The serial transceiver transceivers output clocks from both the receiver and the transmitter called RXOUTCLK and TXOUTCLK. RXOUTCLK is a word-rate recovered clock generated by the CDR in the serial transceiver. TXOUTCLK is a word-rate clock generated by the serial transceiver TX.

Typically, RXOUTCLK and TXOUTCLK are routed through global clock buffers (BUFG). After being buffered by a BUFG the RXOUTCLK drives the RXUSRCLK and RXUSCRCLK2 ports of the serial transceiver and the rx_clk port of the SMPTE UHD-SDI core. Likewise, the global version of TXOUTCLK drives the TXUSRCLK and TXUSRCLK2 ports of the serial transceiver and the tx_clk port of the SMPTE UHD-SDI core.