If dynamic switching between the two 12G-SDI line rates is an absolute requirement, then things get much more complicated. Dynamic switching is possible, but has significant implications.
To support dynamic switching between the two 12G-SDI line rates, the reference clock to the QPLL must be dynamically switched between 148.5 MHz and 148.5/1.001 MHz. Anytime the reference clock frequency to the QPLL is dynamically switched, the QPLL must be reset. Furthermore, the only 12G-SDI rate supported by the entire quad at any point in time is dictated by which reference clock frequency is given to the QPLL. Thus, it is possible to switch the entire quad between 11.88 Gb/s and 11.88/1.001 Gb/s, but all RX and TX units in the quad running in 12G-SDI mode always runs at the that one 12G-SDI line rate dictated by the QPLL reference clock. It is not possible to have some units in the quad running at 11.88 Gb/s and others at 11.88/1.001 Gb/s.
Any RX unit that is using the QPLL as the serial clock source for 6G-SDI is upset when the reference clock to the QPLL is dynamically switched between reference clock frequencies and reset. Any TX unit in the quad that is using the QPLL as the serial clock source not only experiences an upset when the QPLL is reset, but also experiences a 1000 ppm shift in line rate as a result of the QPLL changing reference clock frequencies.
Thus, for most applications, support for dynamic switching between the two 12G-SDI line rates makes it difficult to implement multiple SDI interfaces in the same GTX quad. The application can never support RX or TX of both 12G-SDI line rates in the same GTX quad simultaneously. And, any switch between 12G-SDI line rates impacts any RX or TX unit in the quad using the QPLL.
There are several possible use cases where dynamic switching between 12G-SDI
line rates can be practical. One such use case is shown in the following figure. In
this use case, each transceiver is RX only or TX only. The top two transceivers in
the figure are RX only and the bottom two transceivers are TX only. When operating
at 6G-SDI line rates and below, an RX or TX unit always uses the transceiver CPLL.
The CPLL is dynamically switched between the two reference clocks as required using
the CPLLREFCLKSEL port. Any RX or TX unit running
at 12G-SDI rates, must use the QPLL as the clock source. The QPLL can be dynamically
switched between the two reference clock frequencies as required. But, all units
operating at 12G-SDI rates switches between the two 12G-SDI line rates
simultaneously as the QPLL dynamically switches between reference clock frequencies.
Any mix of RX and TX units in the quad can be supported this way; it does not have
to be two RXs and two TXs.
The reason for limiting each transceiver to just RX or just TX and not both is to make it easier to use the CPLL. Because the CPLL is needed for both RX and TX, sharing the CPLL is somewhat difficult. Whenever the CPLL is dynamically switched between reference clock sources, it affects both the RX and the TX unit if they were both active and using the clock from the CPLL. If, however, the application does not care that both the RX and TX are affected by dynamically switching the CPLL between the two reference clock frequencies, then it is possible to use a transceiver to transmit and receive at the same time.