Case #1: Maximum Line Rate is 6G-SDI or Lower - 1.0 English - PG205

First, consider applications where the maximum line rate is 6G-SDI or lower. In such applications, it is common to use only the QPLL as the clock source for all receivers in the GTX quad. The QPLL operates in range 1 and is, therefore, fully characterized as a clock source for the receivers running at 3G, HD, and SD rates. And, because at 6G-SDI and lower rates, the GTX CDR has ±1250 ppm tolerance, the receivers can receive any SDI line rate, both integer frame rate and non-integer frame rate, using the single clock frequency supplied by the QPLL. The transmitters, if they are to support both integer and non-integer frame rates, must have available two different clock frequencies. The most common configuration is show in the following diagram where the QPLL is given a 148.5 MHz reference clock and supplies a clock to all the RX units in the quad. Each CPLL is given a 148.5/1.001 MHz (approximately 148.35 MHz) reference clock. Each TX unit can be switched between the QPLL and the CPLL, depending on which rate they are transmitting.

Each RX and TX unit has its own PLL clock divider that can divide the serial clock from the PLL by 1, 2, 4, or 8. When the maximum line rate supported is 6G-SDI, the QPLL has a frequency of 5.94 GHz and the CPLL has a frequency of 2.97/1.001 GHz. The QPLL output is divided by 2 before being distributed to the GTXE2_CHANNEL transceivers, thus the two clocks available to the GTXE2_CHANNEL are 2.97 GHz and 2.97/1.001 GHz. At the output of the clock dividers, the clock frequency must be one half the line rate. For example, for 3G-SDI operation at 2.97 Gb/s, a clock frequency of 1.485 GHz is required after the clock divider. The following table shows the divide values that must be used in each RX and TX to run at the various SDI line rates. SD-SDI always runs at the same line rate as 3G-SDI and uses 11X oversampling techniques. When the maximum line rate supported by the application is 6G-SDI, then the divider values shown in the CPLL and QPLL (Range 1) columns are used.