When you select the
Mode option as runtime switchable, the cmac_usplus_0_trans_debug module will be present in the example design. This
cmac_usplus_0_trans_debug module is responsible for
performing the DRP write operation to switch the transceiver operation mode, that is, CAUI-10
to CAUI-4/CAUI-4 to CAUI-10. When you set the switch_caui_mode signal High for at least two clock cycles and make it Low, it
starts the DRP write operation for the GT common and GT channel and resets the core. The state
transition occurred during this process is shown in the following figure.
Figure 1. State Transition Diagram for Runtime Switchable DRP Operation
