References - 3.1 English - PG203

These documents provide supplemental material useful with this guide:

1. IEEE 1588-2008
2. IEEE std 802.3-2012
3. Virtex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics (DS893)
4. Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS923)
5. UltraScale FPGAs Transceivers Wizard LogiCORE IP Product Guide (PG182)
6. UltraScale Architecture Clocking Resources User Guide (UG572)
7. UltraScale Devices Integrated 100G Ethernet LogiCORE IP Product Guide (PG165)
8. UltraScale Architecture GTH Transceivers User Guide (UG576)
9. UltraScale Architecture GTY Transceivers User Guide (UG578)
10. Vivado Design Suite User Guide: Designing with IP (UG896)
11. Vivado Design Suite User Guide: Logic Simulation (UG900)
12. Vivado Design Suite User Guide: Using Constraints (UG903)
13. Vivado Design Suite User Guide: Implementation (UG904)
14. Vivado Design Suite User Guide: Programming and Debugging (UG908)
15. Vivado Design Suite User Guide: Getting Started (UG910)
16. ISE to Vivado Design Suite Migration Guide (UG911)
17. Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973)
18. Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994)
19. 10G/25G High Speed Ethernet Subsystem Product Guide (PG210)
20. 100G IEEE 802.3bj Reed-Solomon Forward Error Correction LogiCORE IP Product Guide (PG197) (registration required)