PCS Lane Mapping - 3.1 English - PG203

UltraScale+ Devices Integrated 100G Ethernet Subsystem LogiCORE IP Product Guide (PG203)

Document ID
PG203
Release Date
2024-07-17
Version
3.1 English

The stat_rx_pcsl_number_[0:19][4:0] signal indicates which physical lane is receiving PCS lanes [0:19]. See PCS Lane Multiplexing to understand the mapping of these 20 Physical lanes to the 4 GT lanes in the case of CAUI-4 or 10 GT lanes in the case of CAUI-10.

In CAUI-10 mode, data on GT0 maps to physical lanes 0 and 1, and so forth; GT9 maps to physical lanes 18 and 19. In CAUI-4 mode, data on GT0 maps to physical lanes 0:4, and so forth; GT3 maps to physical lanes 15:19.