Modifications - Modifications - 3.1 English - PG203

UltraScale+ Devices Integrated 100G Ethernet Subsystem LogiCORE IP Product Guide (PG203)

Document ID
PG203
Release Date
2025-12-17
Version
3.1 English
  • DRP addresses are different between the architectures. Refer to DRP Address Map of the CMAC Block for the DRP address map for the Integrated 100G Ethernet MAC in UltraScale+ FPGAs.