Case 1: UltraScale+ Device MIPI D-PHY TX Core (Line Rates above 600 Mb/s) - 4.3 English - PG202

MIPI D-PHY LogiCORE IP Product Guide (PG202)

Document ID
PG202
Release Date
2024-12-04
Version
4.3 English

The following figure shows the sharable resource connections from the MIPI D-PHY TX core with shared logic included (DPHY_TX_MASTER) to the instance of another MIPI D-PHY TX core without shared logic (DPHY_TX_SLAVE) and the line rate is above 600 Mb/s.

Figure 1. Shared Logic Example for MIPI D-PHY TX Core (Line Rate above 600 Mb/s)