Register Space - 2.1 English - PG199

DisplayPort 1.2 TX Subsystem LogiCORE IP Product Guide (PG199)

Document ID
PG199
Release Date
2024-12-11
Version
2.1 English

This section details registers available in the DisplayPort TX Subsystem. The address map is split into following regions:

  • Dual Splitter
  • VTC 0 (Up to 3 for 4 streams)
  • DisplayPort Transmit
  • HDCP Controller
  • AXI Timer
Note: For details about accessing these registers, see .