| Offset | R/W | Definition |
|---|---|---|
| 0x080 | RW |
TRANSMITTER_ENABLE. Enable the basic operations of the transmitter.
|
| 0x084 | RW |
MAIN_STREAM_ENABLE. Enable the transmission of main link video information.
Note: Main stream enable/disable functionality is gated by the
VSYNC input. The values written in the register are applied at the video frame
boundary only.
|
| 0x090 | RW |
VIDEO_PACKING_CLOCK_CONTROL: This register is used when GT data width is 32-bit.To meet the bandwidth requirement for the resolutions where vid_clk/vid_pixel_mode < lnk_clk frequency and with BPC 12/16 the video packing has to work at lnk_clk, setting the bit to '1' enables the packing from lnk_clk domain. By default video data packing is done in Vid_clk.All the resolutions with less than or equal to 10-BPC works with packing at vid_clk.
|
| 0x0C0 | WO |
FORCE_SCRAMBLER_RESET. Reads from this register always return 0x0.
|
| 0x0D0 | RW |
TX_MST_CONFIG: MST Configuration.
|
| 0x0F0 | RW |
TX_LINE_RESET_DISABLE. TX line reset disable. This register bits have to be used to disable the end of line reset to the internal video pipe in case of reduced blanking video support.
|