Building the Example Design - 2.1 English - PG199

DisplayPort 1.2 TX Subsystem LogiCORE IP Product Guide (PG199)

Document ID
PG199
Release Date
2024-12-11
Version
2.1 English
  1. Open the Vivado Design Suite and click Create Project.
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  2. In the New Project window, enter a Project name, Project location, and click Next up to the Board/Part selection window.
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  3. In the Default Part window, select the Board as per your requirement. Application Example Designs are available for KC705, KCU105, and ZCU102. As an example, the AMD Kintex™ 7 KC705 board is selected.
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  4. Click Finish.
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  5. In the Flow Navigator, click Create Block Design (BD). Select a name for BD and click OK.
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  6. Right-click BD and click Add IP. Search for DisplayPort and select either the DisplayPort RX Subsystem IP (for RX only (ZCU102) or Pass-through (KC705, KCU105) designs) or the DisplayPort TX Subsystem IP (for TX only (ZCU102) or Pass-through (KC705, KCU105) designs).
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  7. Double-click the IP and go to the Application Example Design tab in the Customize IP window. Select the supported topology in the Application Example Design drop-down box. Click OK and Save the block design.
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  8. Right-click the DisplayPort Subsystem IP under Design source in the Design tab and click Open IP Example Design. Generated by Your Tool
  9. Choose Example project directory and click OK.
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  10. The following figure shows the Vivado IP integrator design. Choose the Generate Bitstream.
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  11. Export the hardware to SDK. Click File > Export > Export Hardware.
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  12. Ensure the Include bitstream is enabled and click OK (use the default Export Location <Local to Project>).

  13. Click File > Launch SDK. Choose the SDK Workspace location. Keep the exported location default configuration (<Local to Project>).