Receive Reset - Receive Reset - 4.1 English - PG198

JESD204 PHY v4.1 Product Guide (PG198)

Document_ID
PG198
Release_Date
2025-01-30
Version
4.1 English

•The receive reset input (rx_reset_gt) initiates a data path only reset sequence for the receive logic data path, and rx_reset_done is asserted when the reset sequence is complete.

•The (rx_sys_reset) input initiates a complete data path and PLL reset sequence and asserts rx_reset_done when complete.

The following figure shows UltraScale GT Reset Control.

Figure 3-1:      UltraScale GT Reset Control

X-Ref Target - Figure 3-1

ultrascale_GT_reset_control.jpg